The capacitance of conventional, two-dimensional, metal-insulator-metal capacitors associated with microelectronic applications is limited to the die or chip area they possess. One method to increase capacitance involves using thinner insulating layers that may break down or new insulating materials.
Because the area that capacitors take up on the die detracts from space which can be used for devices and other structures, a method is sought that increases the effective capacitance without increasing the area it spans on the chip.